
To save you the trouble of downloading things of which you don't need 99%,
I've included below a list of relevant address bit maps for some chipsets. 
Only configurations with SDRAM are mentioned here. 
[If you happen to have data on other chipsets, please let me know.]

These tables are of course only valid if the main board doesn't also swap
address lines.


Intel BX Chipset
================
                         .----------.
                         |          V
            Split Row/ SDRAM BA1 BA0 A10/ A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
                  Col   A11           AP

Option 1    12x8* Row             11  12  14 13 22 21 20 19 18 17 16 15
8 MB              Col             11  AP        10  9  8  7  6  5  4  3

Option 2    12x9* Row             12  23  14 13 22 21 20 19 18 17 16 15
16 MB             Col             12  AP     11 10  9  8  7  6  5  4  3

            13x8* Row         12  11  23  14 13 22 21 20 19 18 17 16 15
                  Col         12  11  AP        10  9  8  7  6  5  4  3

Option 3   12x10* Row             13  23  14 24 22 21 20 19 18 17 16 15
32 MB             Col             13  AP  12 11 10  9  8  7  6  5  4  3

            14x8* Row    13   12  11  23  14 24 22 21 20 19 18 17 16 15
                  Col         12  11  AP        10  9  8  7  6  5  4  3

Option 4    14x9* Row    25   13  12  23  14 24 22 21 20 19 18 17 16 15
64 MB             Col         13  12  AP     11 10  9  8  7  6  5  4  3

Option 5   14x10* Row    25   14  13  23  26 24 22 21 20 19 18 17 16 15
128 MB            Col         14  13  AP  12 11 10  9  8  7  6  5  4  3

Note: * indicates SDRAM organization


Intel VX Chipset
================

Note: the documentation is very unclear on this subject; below is my
personal interpretation. 

            Split Row/  BA0 A10/ A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
                  Col        V

8 MB        12x8  Row    11  22  21 20 19 18 17 16 15 14 13 12
(1Mx64bits)       Col    11  V         10  9  8  7  6  5  4  3

16 MB       12x9  Row    11  22  21 20 19 18 17 16 15 14 13 12
(2Mx64)           Col    11  V      23 10  9  8  7  6  5  4  3

32 MB      12x10  Row    11  22  21 20 19 18 17 16 15 14 13 12
(4Mx64)           Col    11  V   24 23 10  9  8  7  6  5  4  3

Note: double-sided DIMM modules behave as two separate modules of half the
total size. 

